1, Field of the Invention
Embodiments of the present invention relate to a source driver of or for a liquid crystal display apparatus.
2, Discussion of the Related Art
A display apparatus may include a display panel, a source driver to drive a data line of the display panel, a gate driver to drive a gate line of the display panel, and a control unit to provide the source driver with a voltage and one or more control signals.
The control unit may include a circuit board, a power supply unit mounted on the circuit board, and a timing controller. The power supply unit may supply a voltage to the source driver, and the control unit may supply a control signal to control the source driver.
The gate driver and the source driver may be electrically connected to the display panel via mounting technologies such as, for example, Surface Mount Technology (SMT), Chip On Board (COB), Chip On Glass (COG), or Chip On Film (COF).
For example, the gate driver and the source driver may be directly mounted on a liquid crystal panel and electrically connected to the liquid crystal panel via a wire formed on a glass substrate(e.g., of the display panel).
In addition, the circuit board of the control unit and the wire on the liquid crystal panel may be electrically connected to each other via a flexible circuit board.
The power supply unit may supply an output (e.g., a supply voltage) to the source driver through a wire on the circuit board, a wire on the flexible circuit board, and the wire on the liquid crystal panel. However, resistances of the respective wires may reduce the supply voltage to the source driver, which may increase the slew rate of the source driver.
In particular, the wire on the liquid crystal panel (made from, for example, an Indium Tin Oxide [ITO] layer) has a relatively high resistance, and demands for minimizing the wire width (e.g., due to a narrow bezel) increases the resistance of power supply wires.
A driver integrated circuit (D-IC) may provide 1284 channel outputs and include a bias circuit for DC biasing of an output buffer. In the bias circuit, the output current of a reference current circuit, which is unaffected by the supply voltage and temperature variations, is mirrored to a main bias and re-mirrored to local bias branches of left and right channels.
A power supply of the D-IC includes serially combined resistances of the ITO wire on glass, a PAD, and an IC inner wire. A power supply of the output buffer faces a greater resistance with increasing distance from an input of the IC power supply.
While the D-IC is operating, the power supply of the output buffer may undergo a voltage (e.g., IR) drop due to use of driving current and the resistance of the power supply wire. The IR drop of a supply voltage reaches a maximum value when the wire resistance is at the maximum value. Under this condition, the output of a local bias circuit configured to hold operating current of the output buffer may be short-circuited to a common level regardless of a position of the local bias in the D-IC. As a result, the output of the local bias circuit is averaged and applied to the output buffer.
Output buffers of 1284 channels, which receive a common bias voltage level, operate in different respective supply voltage states according to positions thereof in the IC, due to IR drop caused by the wire resistance.
With the above-described mechanism, the |VG−VS| voltage of an output buffer tail bias transistor differs between the respective channels, causing deviation in the amount of tail current. Consequently, this causes deviation in the slew rate of the 1284 outputs during output signal transitions.
The slew rate deviation generated as described above causes a deviation in the pixel voltage charge/discharge times, which may result in deterioration in resolution while driving signals in a high-speed TFT-LCD panel.